1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device and a manufacturing method for the same. More specifically, the present invention relates to a non-volatile semiconductor memory device in which data can be electrically rewritten, and a manufacturing method for the same.
2. Description of the Related Art
A flash memory that represents a non-volatile semiconductor memory device in which data can be electrically rewritten will be described below. A flash memory has: a first insulating film 2; a first polysilicon electrode 3 that becomes a floating gate; a second insulating layer 4 formed of a lamination made of an oxide film, a nitride film and another oxide film; and a second polysilicon electrode 5 that becomes a control gate which are laminated on a semiconductor substrate 1 in this order shown in FIG. 5.
This flash memory allows for rewriting of data through release and injection of electrons via the first insulating film 2 by utilizing the tunnel phenomenon; therefore, the first insulating film 2 is also referred to as a tunnel insulating film. The first insulating film 2 usually has a film thickness of approximately 8 to 20 nm. In addition, it is difficult to form a high quality insulating film that doesn't cause much leak current on polysilicon.
Therefore, the second insulating layer 4 is made of a lamination of, for example, a polysilicon oxide film, a CVD silicon nitride film and a CVD silicon oxide film so as to secure relaxation of the electrical field and capacity coupling between the control gate and the floating gate. The upper and lower oxide films serve as barrier layers against charge injections from the gate. The intermediate nitride film has a relative dielectric constant higher than that of the oxide films, thereby the second insulating layer 4 can secure a physical film thickness. Furthermore, the electrical field in the insulating film can be relaxed while securing the same capacitance as in the case of a single layer of an oxide film, thereby a leak current can be reduced in comparison with the case of a single layer of an oxide film.
In a non-volatile semiconductor memory device having a floating gate, the potential of the floating gate electrode is controlled through the capacity coupling between the floating gate electrode and the control gate electrode by controlling the potential of the control gate. FIG. 6 shows a simplified equivalent circuit diagram of a non-volatile semiconductor memory device having a floating gate. Herein, a potential Vfg of a floating gate “a” is represented as follows in the case where a semiconductor substrate 1 is grounded:Vfg=C1/(C1+C2)×Vcg−Qfg/(C1+C2)  (1)wherein C1 denotes a capacity between the floating gate “a” and a control gate “b”, C2 denotes a capacity between the floating gate “a” and the semiconductor substrate 1, and Vcg denotes a control gate voltage.
That is, the floating gate voltage is controlled by the control gate voltage. The second term in the above expression representing the potential of the floating gate “a” changes creating a difference of the readout current in accordance with the amount of charge accumulated within the floating gate “a”. This difference is detected by a readout circuit so as to determine the memory condition of the memory cell. As for rewriting of data, a high voltage is generated between the semiconductor substrate 1 and the floating gate “a” via the control gate “b” so that electrons are tunneled through this portion of insulating film, thereby a release or an injection of electrons is carried out.
In addition, Japanese Unexamined Patent Publication No. 2001-160555 discloses a non-volatile semiconductor memory device having the same structure as the above, except that a nitride film formed of radical nitriding species is utilized for the second insulating film.
C1/(C1+C2) in the above expression (1) is referred to as a gate coupling ratio. The control gate voltage that is required to obtain a constant floating gate voltage required for the rewriting operation is in the relationship of inverse proportion with this gate coupling ratio.
A high voltage is necessary as the rewriting voltage in the above-described non-volatile semiconductor memory device according to the conventional art. This is because a sufficient voltage that can provide energy exceeding the band gap of this film to electrons is necessary to be applied to the control gate at the time when electrons are injected through the first insulating film (tunnel insulating film) 2, and the voltage applied to the first insulating film is based on the above-described gate coupling ratio, making it necessary for a greater voltage to be applied between the semiconductor substrate and control gate.
It is necessary to apply a high voltage to the control gate in the case where the capacitance between the above-described floating gate and the control gate is small, leading to the reduction of the gate coupling ratio. It is effective to increase the capacitance value between the floating gate and the control gate in order to increase this gate coupling ratio. In order to achieve this, there are two methods: a method for increasing the areas of the capacitor portion between the above-described floating gate and the control gate; and a method for reducing the thickness of the insulating film in this capacitance portion.
According to the former method, the dimensions of the device are increased. Therefore, the latter method is more advantageous in forming a device of a large capacitance. A lamination of oxide film/nitride film/oxide film is adopted in the conventional art as described above. The upper and lower oxide films are, for example, a thermal oxide film on polysilicon and an oxide film formed by means of a CVD, respectively. The insulating characteristics of the gate insulating film of a MOSFET formed on a silicon substrate are greatly inferior to those of a thermal oxide film formed on silicon single crystal (second electrode) having a plane direction of (100). Furthermore, electrons (leak current) flow through the lower layer oxide film in the first insulating film due to the concentration of electrical field in portions forming corners of the first silicon electrode and in the vicinity of grain borders of polysilicon in the case where the oxide film is reduced in the thickness. These electrons are trapped in the intermediate layer comprised nitride film that has been made according to a CVD under low pressure. The trapped electrons intensify the electrical field in the lower layer oxide film; therefore, a leak current cause through this portion even under the condition of low electrical field bias. A similar phenomenon is caused to the second polysilicon electrode and the upper oxide film thereon. In addition, the insulating characteristics of the intermediate layer comprised nitride film are deteriorated to the performance level corresponding to that of the single layer polysilicon oxide film in the case where the nitride film is reduced in the thickness, leading to the failure in relaxing the electrical field through out the entire complex insulating film.
As described above, the performance of blocking the leak current in the second insulating film is suppressed to a low level in the case where the second insulating film is reduced in the thickness according to a conventional method in order to reduce the rewriting voltage, and it becomes difficult to carry out the rewriting operation of the flash memory and to properly hold charge. As a result, the gate coupling ratio can not be increased; therefore, the reduction in the operation voltage is difficult.
Furthermore, the oxide film formed on the top surface of the polysilicon electrode according to the conventional art is a thermal oxide film formed at a temperature of 800° C. or more. This heat treatment at a temperature of 800° C. or more makes the grains grow in the base polysilicon electrode. Such growth of the grains increases the unevenness on the surface of the polysilicon electrode, resulting in a great loss of flatness on the surface on which an insulating film is to be formed. Therefore, the insulating performance tends to be lost due to the concentration of the electrical field caused by microscopic unevenness of the capacitor.
In addition, the tighter the bond of Si—N in the nitride film formed of radical nitriding species is, the higher the barrier property of the nitride film itself against nitriding species in the second insulating layer formed of radical nitriding species described in Japanese Unexamined Patent Publication No. 2001-160555. Therefore, the diffusion of the nitriding species is blocked and the growth rate of this nitride film tends to be saturated, making it difficult to obtain an arbitrary thickness.